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Added volume increase & Hirarchy boards

master
Rino Grupp 3 years ago
parent
commit
216ff6010c
10 changed files with 32488 additions and 0 deletions
  1. BIN
      Frequenzweiche.dspproj
  2. +29299
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      IC 2_Frequenzweiche/as_code.enc
  3. +13
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      IC 2_Frequenzweiche/net_list.cir2
  4. +31
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      IC 2_Frequenzweiche/net_list_out2/compiler_output.txt
  5. +1024
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      IC 2_Frequenzweiche/net_list_out2/hex_program_data.dat
  6. +1024
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      IC 2_Frequenzweiche/net_list_out2/hex_program_simdata.dat
  7. +1024
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      IC 2_Frequenzweiche/net_list_out2/program_data.dat
  8. +69
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      IC 2_Frequenzweiche/net_list_out2/spi_map.dat
  9. +2
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      IC 2_Frequenzweiche/net_list_out2/trap.dat
  10. +2
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      IC 2_Frequenzweiche/trap.dat

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Frequenzweiche.dspproj View File


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IC 2_Frequenzweiche/as_code.enc
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IC 2_Frequenzweiche/net_list.cir2 View File

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0 ICSigma100In1 O_C0_A0_P1_out Link4 O_C0_A0_P2_out Link2
1 DCInpAlg1 O_C180_A0_P1_out Link6
2 ExtSWGainDB1 I_C74_A0_P1_in Link6 I_C74_A0_P2_in Link4 I_C74_A0_P4_in Link2 O_C74_A0_P3_out Link3 O_C74_A0_P5_out Link5
3 SingleBandLevelDet3 I_C33_A0_P1_in Link3 O_C33_A0_P2_out Link7
4 SingleBandLevelDet2 I_C37_A0_P1_in Link5 O_C37_A0_P2_out Link8
5 PEQ1Chan1 I_C284_A0_P1_in Link7 I_C284_A0_P3_in Link8 O_C284_A0_P2_out Link0 O_C284_A0_P4_out Link1
6 BassBAlg_stereo1 I_C289_A0_P1_in Link0 I_C289_A0_P2_in Link1 O_C289_A0_P3_out Link9 O_C289_A0_P4_out Link10
7 CrossoverFilter2WayAlgDP3 I_C227_A0_P1_in Link9 O_C227_A0_P2_out Link12 O_C227_A0_P3_out Link13
8 CrossoverFilter2WayAlgDP4 I_C227_A1_P1_in Link10 O_C227_A1_P2_out Link11 O_C227_A1_P3_out Link14
9 ICSigma100Out4 I_C58_A0_P1_in Link13
10 ICSigma100Out1 I_C20_A0_P1_in Link14
11 ICSigma100Out3 I_C56_A0_P1_in Link12
12 ICSigma100Out2 I_C54_A0_P1_in Link11

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IC 2_Frequenzweiche/net_list_out2/compiler_output.txt View File

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Analog Devices Graphical Compiler Tool for Sigma DSP build date = 2008
Done Reading Nodelist ...
Done reading file,
Done Reading Parameter list ...
################## Summary ########################
(Note: Estimates are based on a 48 kHz sample rate)
Number of instructions used (out of a possible 1024 ) = 290
Data RAM used (out of a possible 2048 ) = 152
Parameter RAM used (out of a possible 1024 ) = 100
Files written:
program_data.dat - load file for downloading code using ADI loader
hex_program_data.dat - load file for downloading code using microcontroller
spi_params.dat - file of parameter values for each instance, used by gen_spi program to make download file
spi_map.dat - Parameter RAM locations for each schematic instance
trap.dat - lists the values to enter in the trap registers to output a signal to the data-capture output pin.

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IC 2_Frequenzweiche/net_list_out2/hex_program_data.dat
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IC 2_Frequenzweiche/net_list_out2/hex_program_simdata.dat
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IC 2_Frequenzweiche/net_list_out2/program_data.dat
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IC 2_Frequenzweiche/net_list_out2/spi_map.dat View File

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DCInpAlg1_2 0
ExtSWGainDB1step_3 1
SingleBandLevelDet3TCONST_4 2
SingleBandLevelDet3hold_4 3
SingleBandLevelDet3decay_4 4
SingleBandLevelDet2TCONST_5 5
SingleBandLevelDet2hold_5 6
SingleBandLevelDet2decay_5 7
PEQ1Chan10B1_6 8
PEQ1Chan11B1_6 9
PEQ1Chan12B1_6 10
PEQ1Chan11A1_6 11
PEQ1Chan12A1_6 12
PEQ1Chan10B2_6 13
PEQ1Chan11B2_6 14
PEQ1Chan12B2_6 15
PEQ1Chan11A2_6 16
PEQ1Chan12A2_6 17
BassBAlg_stereo1freq_varq_7 18
BassBAlg_stereo1iir_coeff_0_biq_7 19
BassBAlg_stereo1iir_coeff_1_biq_7 20
BassBAlg_stereo1iir_coeff_2_biq_7 21
BassBAlg_stereo1iir_coeff_3_biq_7 22
BassBAlg_stereo1iir_coeff_4_biq_7 23
BassBAlg_stereo1compbase_table1_comp_7 24
BassBAlg_stereo1compbase_table1_p1_comp_7 25
BassBAlg_stereo1TCONST_comp_7 57
CrossoverFilter2WayAlgDP3LowInvert_8 58
CrossoverFilter2WayAlgDP3B0_0_8 59
CrossoverFilter2WayAlgDP3B1_0_8 60
CrossoverFilter2WayAlgDP3A1_0_8 61
CrossoverFilter2WayAlgDP3B2_0_8 62
CrossoverFilter2WayAlgDP3A2_0_8 63
CrossoverFilter2WayAlgDP3B0_1_8 64
CrossoverFilter2WayAlgDP3B1_1_8 65
CrossoverFilter2WayAlgDP3A1_1_8 66
CrossoverFilter2WayAlgDP3B2_1_8 67
CrossoverFilter2WayAlgDP3A2_1_8 68
CrossoverFilter2WayAlgDP3B0_2_8 69
CrossoverFilter2WayAlgDP3B1_2_8 70
CrossoverFilter2WayAlgDP3A1_2_8 71
CrossoverFilter2WayAlgDP3B2_2_8 72
CrossoverFilter2WayAlgDP3A2_2_8 73
CrossoverFilter2WayAlgDP3B0_3_8 74
CrossoverFilter2WayAlgDP3B1_3_8 75
CrossoverFilter2WayAlgDP3A1_3_8 76
CrossoverFilter2WayAlgDP3B2_3_8 77
CrossoverFilter2WayAlgDP3A2_3_8 78
CrossoverFilter2WayAlgDP4LowInvert_9 79
CrossoverFilter2WayAlgDP4B0_0_9 80
CrossoverFilter2WayAlgDP4B1_0_9 81
CrossoverFilter2WayAlgDP4A1_0_9 82
CrossoverFilter2WayAlgDP4B2_0_9 83
CrossoverFilter2WayAlgDP4A2_0_9 84
CrossoverFilter2WayAlgDP4B0_1_9 85
CrossoverFilter2WayAlgDP4B1_1_9 86
CrossoverFilter2WayAlgDP4A1_1_9 87
CrossoverFilter2WayAlgDP4B2_1_9 88
CrossoverFilter2WayAlgDP4A2_1_9 89
CrossoverFilter2WayAlgDP4B0_2_9 90
CrossoverFilter2WayAlgDP4B1_2_9 91
CrossoverFilter2WayAlgDP4A1_2_9 92
CrossoverFilter2WayAlgDP4B2_2_9 93
CrossoverFilter2WayAlgDP4A2_2_9 94
CrossoverFilter2WayAlgDP4B0_3_9 95
CrossoverFilter2WayAlgDP4B1_3_9 96
CrossoverFilter2WayAlgDP4A1_3_9 97
CrossoverFilter2WayAlgDP4B2_3_9 98
CrossoverFilter2WayAlgDP4A2_3_9 99

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IC 2_Frequenzweiche/net_list_out2/trap.dat View File

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Instance 4 Signal SingleBandLevelDet3single_out trap value 54 register mult_out
Instance 5 Signal SingleBandLevelDet2single_out trap value 87 register mult_out

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IC 2_Frequenzweiche/trap.dat View File

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Instance 4 Signal SingleBandLevelDet3single_out trap value 54 register mult_out
Instance 5 Signal SingleBandLevelDet2single_out trap value 87 register mult_out

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